Superconducting circuit technologies are at the forefront ofquantum research, offering promising pathways for advancements in quantumcomputing, sensing, and communication. These devices typically operate atextremely low power levels, often at the scale of just a few photons. Suchlow-power operation introduces several challenges, particularly concerningsignal amplification and protection from noise. Currently, commerciallyavailable solutions-including low-noise High Electron Mobility Transistor(HEMT) amplifiers, traveling-wave parametric amplifiers (TWPA) and microwavecirculators/isolators operating in the GHz frequency range- together haveenabled single-shot readout of hundreds of qubits in state-of-the-artimplementations. However, as the field advances toward quantum-errorcorrection, the number of physical qubits required is expected to grow into thethousands or even millions. The increase in qubit count presents significantbottlenecks for existing readout strategies, especially within the constraintsof a typical dilution refrigerator setup, which provides a limited amount ofexperimental space and cooling power.
Building on recentdevelopments in the field, solutions capable of overcoming some of theselimitations are being developed in our group. This master's thesis project willbuild on our current understanding and expand the focus by developing on-chipsuperconducting circuit solutions for readout components. The approach utilizesnonlinear parametric processes to engineer interactions between electromagneticmodes to achieve amplification and/or isolation. The student will use analyticalmodeling and circuit/layout simulations to evaluate, assess and propose aninnovative architecture designed to overcome the scaling limitations inherentin current readout strategies.
Type of internship: Master internship
Required educational background: Physics, Electrotechnics/Electrical Engineering, Nanoscience & Nanotechnology
Supervising scientist(s): For further information or for application, please contact Vadiraj Ananthapadmanabha Rao (< E-Mail aus Sicherheitsgründen gelöscht >)
The reference code for this position is 2026-INT-101. Mention this reference code in your application.
Applications should include the following information:
Incomplete applications will not be considered.
Building on recentdevelopments in the field, solutions capable of overcoming some of theselimitations are being developed in our group. This master's thesis project willbuild on our current understanding and expand the focus by developing on-chipsuperconducting circuit solutions for readout components. The approach utilizesnonlinear parametric processes to engineer interactions between electromagneticmodes to achieve amplification and/or isolation. The student will use analyticalmodeling and circuit/layout simulations to evaluate, assess and propose aninnovative architecture designed to overcome the scaling limitations inherentin current readout strategies.
Type of internship: Master internship
Required educational background: Physics, Electrotechnics/Electrical Engineering, Nanoscience & Nanotechnology
Supervising scientist(s): For further information or for application, please contact Vadiraj Ananthapadmanabha Rao (< E-Mail aus Sicherheitsgründen gelöscht >)
The reference code for this position is 2026-INT-101. Mention this reference code in your application.
Applications should include the following information:
- resume
- motivation
- current study
Incomplete applications will not be considered.
