Ir al contenido

RF Interposer, Electronic, and Photonic Co-Design for AI-Scale Co-Packaged Optical Interconnects

Tesis / Doctorado de 25 a 36 meses

Leuven (Belgium)

Publicado el 10 de noviembre de 2026

  • Contrato

    Tesis / Doctorado de 25 a 36 meses

  • Localización

    Leuven (Belgium)

  • Fecha de inicio

    Lo antes posible

  • Salario

    Información no proporcionada

  • Teletrabajo

    No especificado

Scientific Challenge

Future AI and data-center systems require ultra-high-bandwidth optical interconnects with low power consumption and high integration density. Co-packaged optics (CPO) is a promising solution, but significant challenges remain in integrating photonic devices, wireline electronics, and high-speed interconnects within a compact package. The key challenge is to develop a heterogeneous RF interposer platform that simultaneously provides low insertion loss, minimal crosstalk, precise impedance control, thermal reliability, and cost-effective scalability while supporting both high-speed electrical and optical communication.

Research Objectives

The PhD aims to develop a holistic co-design methodology for next-generation co-packaged optical transceivers by:
  • Designing low-loss RF interposer architectures optimized for optical interconnects.
  • Co-optimizing passive RF structures, wireline electronics, and photonic components to minimize signal degradation and power consumption.
  • Evaluating two integration approaches:
    • Fully integrated EIC architecture, where active and passive functions are implemented on-chip.
    • Hybrid RF interposer architecture, where active circuits remain on-chip while passive components and impedance matching networks are implemented in the package.
  • Quantifying the trade-offs in performance, area, power efficiency, manufacturability, and cost between both approaches.
  • Demonstrating a prototype co-packaged optical transceiver system on an RF interposer platform.

Methodology

The research combines:
  • Electromagnetic (EM) and multi-physics simulation.
  • Passive RF component design and optimization.
  • Photonic-electronic circuit co-design.
  • System-level modeling and co-optimization.
  • Technology benchmarking and trade-off analysis.
  • Fabrication and assembly of demonstrator systems.
  • Experimental validation through high-frequency electrical, optical, thermal, and reliability measurements.

Demonstrators and Validation

The project will develop and experimentally validate high-speed optical transceiver demonstrators representative of future AI and hyperscale data center applications. The demonstrators will benchmark the performance of fully integrated and hybrid RF interposer-based implementations.

Expected Impact

The outcome will be a validated co-design framework and RF interposer technology platform enabling energy-efficient Tb/s optical interconnects. The research will provide design guidelines for future co-packaged optics systems while reducing silicon area, lowering power consumption, improving scalability, and accelerating deployment of AI and data-center optical connectivity solutions.

Keywords: Co-Packaged Optics (CPO), RF Interposer, Silicon Photonics, Wireline Transceivers, Heterogeneous Integration, AI Infrastructure, Data Centers, High-Speed Interconnects, Electronic-Photonic Co-Design

Required background: Electrical engineering, Nanotechnology,

Type of work: 70% modeling/simulation/design, 20% experiment, 10% literature

Supervisor: Xin Yin (UGent)

Co-supervisor: Xiao Sun

Daily advisor: Xiao Sun

The reference code for this position is 2027-106. Mention this reference code in your application.

Fecha límite de candidatura

Siempre que la oferta esté en línea

Nivel de estudios

Doctorado

Función

Tecnología

Más información sobre la empresa

imec

Embracing a better life.

Our future starts with you
How would you describe imec in just one word? We asked our employees, see what imec means to the people behind the chips.
Spearheading semiconductor R&D with the world's most advanced pilot line
Imec Leuven (headquarters) from the sky. Soon this view will change, as new buildings will be added in the near future.
Imec's headquarters in Leuven: the imec tower and one of our cleanrooms. But there's lots of imec buildings hiding behind it!
Into imec's cleanroom! Wafers are being processed 24/7.
From chips to atoms: a tour inside imec's material and components analysis labs.
Diversity as fuel for innovation.
We're defining the future for a better life through technology.