Quantum computers have the potential to solve problems thatare beyond the capabilities of classical computers, such as prime numberfactorization. Systems with millions of logical qubits could revolutionizefields like cryptography, artificial intelligence, and physics simulations.However, scaling these systems presents a major challenge. Typically, qubitsoperate at millikelvin temperatures, while the control electronics remainoutside the cryostat at room temperature, connected by long wires. This configurationadds complexity and makes wiring a significant bottleneck in the development oflarge-scale quantum computers.
Cryogenic CMOS technology offers a promising solution byallowing control electronics to be integrated inside the cryostat, near thequbits, at temperatures around 4 K. Nevertheless, the performance of CMOSdevices at cryogenic temperatures is limited by interface disorder, whichgenerates excess noise and reduces the quantum processor's efficiency.
This project will focus on using noise analysis toinvestigate the impact of interface disorder on scaled CMOS technology nodes.You will gain hands-on experience with cutting-edge technology and have accessto world-class laboratories, contributing directly to a better understandingfuture quantum computing control hardware.
Type of internship: Master internship
Required educational background: Electrotechnics/Electrical Engineering, Nanoscience & Nanotechnology, Physics
Supervising scientist(s): For further information or for application, please contact Edoardo Catapano (< email supprimé pour raison de sécurité >) and Alexander Grill (< email supprimé pour raison de sécurité >)
The reference code for this position is 2026-INT-352. Mention this reference code in your application.
Applications should include the following information:
Incomplete applications will not be considered.
Cryogenic CMOS technology offers a promising solution byallowing control electronics to be integrated inside the cryostat, near thequbits, at temperatures around 4 K. Nevertheless, the performance of CMOSdevices at cryogenic temperatures is limited by interface disorder, whichgenerates excess noise and reduces the quantum processor's efficiency.
This project will focus on using noise analysis toinvestigate the impact of interface disorder on scaled CMOS technology nodes.You will gain hands-on experience with cutting-edge technology and have accessto world-class laboratories, contributing directly to a better understandingfuture quantum computing control hardware.
Type of internship: Master internship
Required educational background: Electrotechnics/Electrical Engineering, Nanoscience & Nanotechnology, Physics
Supervising scientist(s): For further information or for application, please contact Edoardo Catapano (< email supprimé pour raison de sécurité >) and Alexander Grill (< email supprimé pour raison de sécurité >)
The reference code for this position is 2026-INT-352. Mention this reference code in your application.
Applications should include the following information:
- resume
- motivation
- current study
Incomplete applications will not be considered.
