Understanding this behavior modern AI training and inference workloads is crucial for designing optimized memory hierarchies and minimizing data-movement bottlenecks. In this internship, the student will develop a fine-grained workload-to-memory mapping framework that characterizes how representative AI workloads interact with the entire memory stack. This includes profiling layer-level and operator-level footprints, traffic patterns, reuse distances, and temporal/spatial locality. By integrating these insights into a system-level simulation environment, the student will evaluate bottlenecks, identify optimization opportunities, and generate actionable guidelines for future memory hierarchy design targeting large-scale AI systems.

Skills to stand out:

Solid understanding of memory subsystem
Familiarity with AI training and inference workload characteristics
Strong programming skills in C++ or Python
Experience with performance modelling techniques
Exposure to system-level simulation tools or benchmarking frameworks is a plus (Ramulator, DRAMSys, DRAMSim, Gem5, ...)

Type of internship: Master internship, PhD internship

Duration: 6-9 months

Required educational background: Computer Science, Electrotechnics/Electrical Engineering, IT, Nanoscience & Nanotechnology

Supervising scientist(s): For further information or for application, please contact Khakim Akhunov (< e-mail verwijderd om veiligheidsredenen >)

The reference code for this position is 2026-INT-045. Mention this reference code in your application.

Imec allowance will be provided for students studying at a non-Belgian university.

Applications should include the following information: