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Automated electrical characterization for emerging transistor architectures

Internship 25 to 36 months

Leuven (Belgium)

Published on 20 October 2026

  • Contract

    Internship 25 to 36 months

  • Location

    Leuven (Belgium)

  • Start date

    As soon as possible

  • Salary

    Information not provided

  • Remote working

    Not specified

A circuit idea is only as real as its layout. Between acircuit description and a verified, characterized building block lie placement,routing, design-rule and layout-versus-schematic checks, parasitic extractionand characterization, steps that are still largely manual for anything new andthat differ from one transistor architecture to the next. This is where mostpromising ideas stall, and where the models that proposed them meet their firstreal test.

The student will work on automating the physical realizationof digital building blocks on open process design kits with open layout,verification and simulation tools: layout generation driven by the circuit'sstructure, the verification and extraction chain, characterization toindustry-standard formats, and a systematic comparison of the realized resultwith the models that predicted it, so that the models can be corrected wherethey miss.

Type of internship: Master internship

Duration: 6-9 months

Required educational background: Computer Science, Electrotechnics/Electrical Engineering

Supervising scientist(s): For further information or for application, please contact Siva Satyendra Sahoo (< email deleted for security reasons >)

The reference code for this position is 2026-INT-358. Mention this reference code in your application.

Imec allowance will be provided for students studying at a non-Belgian university.

Applications should include the following information:
  • resume
  • motivation
  • current study

Incomplete applications will not be considered.

Application deadline

As long as the job is online

Study level

Master level or equivalent

Job Category

Electronics & Signal Processing

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