Logic synthesis turns a designinto gates with cost models that were written for the technologies of the past:a cell costs what its library entry says, and the structure of the circuitbelow the gate is invisible to the tool. Emerging transistor architectureschange what is cheap and what is expensive at the circuit level, and emergingworkloads change which logic structures matter. A synthesis flow that cannotsee either leaves most of the technology's potential on the table.
The student will work onsynthesis flows that bring technology awareness into the loop: physicallygrounded cost models for logic at the transistor and cell level, their useinside technology mapping and optimisation with open synthesis tools, and anevaluation on benchmark designs that shows how much a technology-aware flowgains over a conventional one and where the gains come from.
Type of internship: Master internship
Duration: 6-9 months
Required educational background: Computer Science, Electrotechnics/Electrical Engineering
Supervising scientist(s): For further information or for application, please contact Siva Satyendra Sahoo (< email deleted for security reasons >)
The reference code for this position is 2026-INT-357. Mention this reference code in your application.
Imec allowance will be provided for students studying at a non-Belgian university.
Applications should include the following information:
Incomplete applications will not be considered.
The student will work onsynthesis flows that bring technology awareness into the loop: physicallygrounded cost models for logic at the transistor and cell level, their useinside technology mapping and optimisation with open synthesis tools, and anevaluation on benchmark designs that shows how much a technology-aware flowgains over a conventional one and where the gains come from.
Type of internship: Master internship
Duration: 6-9 months
Required educational background: Computer Science, Electrotechnics/Electrical Engineering
Supervising scientist(s): For further information or for application, please contact Siva Satyendra Sahoo (< email deleted for security reasons >)
The reference code for this position is 2026-INT-357. Mention this reference code in your application.
Imec allowance will be provided for students studying at a non-Belgian university.
Applications should include the following information:
- resume
- motivation
- current study
Incomplete applications will not be considered.
